Method for the implementation of electronic components in via-holes of a multi-layer multi-chip module

ABSTRACT

The substrate ( 2 ) containing the via-hole ( 3 ) is inserted into an electrophoretic cell ( 1 ) and an electrode ( 6 ) (the “first electrode”) is placed on top of a first orifice of the via-hole(s) ( 3 ), to be implemented with electrical component(s), so that the electrode ( 6 ) totally covers the first orifice. Electrically charged either conductive and/or non-conductive particles are provided by immersing the volume of the via-hole(s) ( 3 ) in a conductive medium ( 17 ) consisting of the electrically charged particles. An electric field is created between the first electrode ( 6 ) and a second electrode ( 4 ) through the via-hole(s) ( 3 ) and the conductive medium ( 17 ) and the electrically charged particles are precipitated on the inner surface of the first electrode ( 6 ) that is directed to the second orifice of the via-hole(s) ( 3 ), until a desired portion of the volume of the via-hole(s) ( 3 ) is filled with a first layer of the charged particles having a desired thickness. More layers may be created by repeating this process using additional electophoretic cell(s), until remaining portion of the volume of the via-hole(s) ( 3 ) is filled with the additional charged particles.

CROSS-REFERENCE TO RELATED APPLICATION

This application is the U.S. National Phase under 35 U.S.C. 371 ofInternational Application PCT/IL01/00991, filed Oct. 25, 2002, whichclaims priority to Israeli Patent Application No. 141118, filed Jan. 25,2001.

FIELD OF THE INVENTION

The present invention relates to the field of integrated multi-layermulti-chip modules (MCMs), to the manufacture of integrated multi-layerMCMs, and specifically to the manufacture of integrated multi-layer MCMsin which electrical components are produced in the via-holes thatprovide the electrical continuity between the layers.

BACKGROUND OF THE INVENTION

Many different types of substrate serve as the supporting andinterconnecting substrate for electronic components. Resistors,capacitors, inductors, and many other types of electronic component aremounted on the substrate in a predetermined manner and electricallyconnected together by a metallic conducting pattern that is deposited onits surface to form the required electronic device.

Resistors, capacitors, and other passive components, such as inductors,typically occupy over 50% of the surface area of the substrate. In orderto provide more room for active devices (e.g. diodes, transistors, ICs,power sources, etc.) on the surface, as well as to miniaturize thedevice, multi-layer devices have been constructed. In these devices,electrical circuits consisting of electronic components and conductingpatterns are constructed on the substrates that makes up each layer. Thelayers are electrically connected by via-holes, which are vertical holesthat are manufactured through the substrate at the appropriate places toprovide conducting paths between the layers.

Many different methods of forming passive electronic circuit elements onsubstrates have been described. For example:

U.S. Pat. No. 5,855,755 describes the production of passive electroniccircuit elements from “electronically conducting polymer films formedfrom photosensitive formulations of pyrrole and an electron acceptorthat have been selectively exposed to UV light, laser light, or electronbeams”. The production of the electronic circuit elements requiresseveral steps including periods of thermal treatment or of drying eitherat room temperature. “Because the photopolymerization process may formlines having sides that are not entirely uniform or smooth, it may bedifficult to obtain resistors within narrow tolerances without furtherprocessing.” In applications where precise resistance is necessary, theresistor lines are made wider than necessary and, after curing, each ofthe resistors is measured and trimmed with a laser to increase theresistance. It may be necessary to carry out the trimming process inseveral stages to achieve the required accuracy.

U.S. Pat. No. 5,872,040 describes a method in which “thin filmelectronic components are deposited on a surface, parameter values aremeasured or estimated, a correction offset file is generated, and thecomponents are trimmed using adaptive lithography.” In this examplealso, many steps are required to produce the electronic components onthe substrate and then in the lithography techniques used to trim thefilms to get the desired electrical values for the elements.

In the currently used methods of producing passive electronic elements,except in the case of parallel plate capacitors in which the substrateitself also serves as the dielectric layer of the capacitor, theelements are produced on one surface of the substrate layers. Thus,creating a multi-layer system results in conducting lines no shorterthan the original single layer MCM with the attendant heating, energyloss, and reduced signal to noise ratio.

Most of the existing methods of producing passive elements on substratesurfaces require multi-step, relatively complex, manufacturing processesand relatively large volumes of expensive substrate material. Also,because of the difficulty in controlling the thickness and shape of thinfilms on the substrate, existing methods result in the production ofelements whose electric characteristics vary from their expected values,thus reducing the performance of the device. The accuracy of thecomponents can be improved by trimming them to change their dimensionsand therefore their electrical characteristics. This trimming adds tothe complexity, time required, and cost of manufacture and sometimesnegative results arise such as burning, in the case of laser trimming,or from the harsh chemicals used in lithographic techniques.

U.S. Pat. Nos. 5,953,203 and 6,055,151 disclose methods for producingcapacitors on multi-layer ceramic circuit boards, using screen printingtechniques, that overcome some of the above mentioned difficulties ofthe existing methods. In particular, they disclose methods of producingthe capacitors that “greatly reduces the shrinkage of the green tapesduring firing in the x and y directions, so that most of the shrinkageoccurs only in the z, or thickness, dimension”. This, presumably,reduces or eliminates the need for trimming of the capacitors. Inaddition a method of producing buried capacitors, “buried one or twotape layers below the top of the substrate” is disclosed, reducingsomewhat the total surface area of substrate required.

The methods disclosed in these patents only partially alleviate thedifficulties of the prior art. They are only applicable to multi-layercircuit boards, and not to other types of substrate. They apply only tothe production of capacitors, with restrictions on the capacitancevalues that are achievable. The method of manufacture is complexrequiring the build up of many layers, including barrier layers neededto prevent dilution effects caused by diffusion of material fromneighboring layers during fixing of the laminated stacks.

There is therefore a need for providing an improved process formanufacturing electronic components for use on integrated multi-layerMCMs that overcomes the limitations of existing methods.

It is a purpose of this invention to provide a method of manufacturingactive and passive electronic components for use on integratedmulti-layer MCMs that overcomes the limitations of existing methods.

It is an additional purpose of this invention to provide a method ofmanufacturing passive electronic components on integrated multi-layerMCMs that is less costly than existing methods. It is a further purposeof this invention to provide a device consisting of integratedmulti-layer MCMs that results in reduced module size, shorter conductinglines, reduced power consumption, and improved signal to noise ratio.

Other purposes and advantages of this invention will appear as thedescription proceeds.

SUMMARY OF THE INVENTION

The present invention is directed to a method for the implementation ofelectrical components in a substrate having via-holes comprising theconstruction of said components within said via-holes. The method of theinvention produces electrical components that may be selected from thegroup comprising:

-   -   capacitors;    -   resistors;    -   piezoelectric elements;    -   inductors;    -   magnetoresistive sensors;    -   magnetic actuators; and    -   batteries.

The electrical components may be formed from either non-conductiveand/or conductive particles that are deposited in predeterminedquantities within the via-holes of the substrate. The conductiveparticles are selected from either metallic or ferro-magnetic particlesand the non-conductive particles are selected from the group comprising:

-   -   dielectric particles;    -   resistive particles;    -   ferromagnetic particles; and    -   piezoelectric particles.

The electrical components may be formed by using an electrophoreticdeposition (EPD) process that may comprise the following steps:

-   -   (a) inserting the substrate containing said via-hole(s) into an        electrophoretic cell, placing an electrode (referred to as        “first electrode”) on top of a first orifice of each of said        via-hole(s), to be implemented with electrical component(s), so        that said electrode totally covers said first orifice;    -   (b) providing electrically charged either conductive and/or        non-conductive particles by immersing the volume of said        via-hole(s) in a conductive medium consisting of said        electrically charged particles;    -   (c) creating an electric field between said first electrode and        a second electrode through said via-hole(s) and said conductive        medium;    -   (d) precipitating said electrically charged particles on the        inner surface of said first electrode that is directed to the        second orifice of said via-hole(s), until a desired portion of        the volume of said via-hole(s) is filled with a first layer of        said charged particles having a desired thickness; and        optionally, if so desired    -   (e) precipitating an additional electrically charged layer,        composed of either conductive and/or nonconductive particles, on        top of the inner surface of said first layer, using a second        electrophoretic cell; and, optionally if so desired    -   (f) repeating the last step using additional electophoretic        cell(s) creating more layers, until the remaining portion of the        volume of said via-hole(s) is filled with said additional        charged particles.

The electrical components may be deposited within the via-holes as onelayer composed of a single type of particle, or co-deposited as onelayer composed of two or more types of particles, or deposited and/orco-deposited as two or more layers each composed of one or more types ofparticles

The invention is also directed towards electrical components that may bedeposited within the via-holes of a substrate and are selected from thegroup comprising:

-   -   capacitors;    -   conductors;    -   resistors;    -   piezoelectric elements;    -   inductors;    -   magnetoresistive sensors;    -   magnetic actuators; and    -   batteries.

The electrical components may be formed from either non-conductiveand/or conductive particles that are deposited in predeterminedquantities within the via-holes of the substrate. The conductiveparticles are selected from either metallic or ferro-magnetic particlesand the non-conductive particles are selected from the group comprising:

-   -   dielectric particles;    -   resistive particles;    -   ferromagnetic particles; and    -   piezoelectric particles.

The invention is also directed to a substrate containing electricalcomponents implemented within the via-holes of said substrate by amethod using an electrophoretic deposition process. The substrate of theinvention contains electrical components that may be selected from thegroup comprising:

-   -   capacitors;    -   conductors;    -   resistors;    -   piezoelectric elements;    -   inductors;    -   magnetoresistive sensors;    -   magnetic actuators; and    -   batteries.

The substrate contains electrical components that are implemented by theelectrophoretic deposition process.

The invention is also directed to a substrate for a multi-chip modulecontaining electrical components implemented by an electrophoreticdeposition process and selected from the group comprising:

-   -   capacitors;    -   conductors;    -   resistors;    -   piezoelectric elements;    -   inductors;    -   magnetoresistive sensors;    -   magnetic actuators; and    -   batteries.

The substrate for a multi-chip module of the invention containselectrical components that may be formed from either non-conductiveand/or conductive particles that are deposited in predeterminedquantities deposited within the via-holes of the substrate. Theconductive particles may be selected from either metallic orferro-magnetic particles and the non-conductive particles may beselected from the group comprising:

-   -   dielectric particles;    -   resistive particles;    -   ferromagnetic particles; and    -   piezoelectric particles.

The electrical components may be deposited within the via-holes of thesubstrate for a multi-chip module of the invention as one layer composedof a single type of particle, or co-deposited as one layer composed oftwo or more types of particles, or consist of a first layer, depositedor co-deposited within the via-holes of the substrate in a first EPDcell, and of a second, or more additional layer, sequentially depositedor co-deposited within the via-holes of the substrate in correspondingseparate EPD cells, wherein each layer is composed of one or more typesof non-conductive or conductive particles.

The invention is also directed to a method for producing a multi-layeredmulti-chip module in which at least a portion of the electricalcomponents are implemented within the via-holes of the substrates thatcomprise the layers of the module, further comprising conductive meansto connect said electrical components with other components of saidmulti-chip module located within the via-holes or on the surface of thesame, or different, layers of said multi-layered multi-chip module.

The invention is also directed to a multi-layered multi-chip module inwhich at least a portion of the electrical components are implementedwithin the via-holes of the substrates that comprises the layers of themodule, by a method using an electrophoretic deposition process andwhich further comprises conductive means to connect the implementedelectrical components within the via-holes with other components of themulti-chip module located in the same, or different layers of themulti-layered multi-chip module.

In the preferred embodiment of the present invention, EPD technology isused for producing the desired electronic components within thevia-hole. In the EPD process the desired electronic components areproduced by the deposition of charged particles onto an electrodeimmersed in either an aqueous or non-aqueous suspension containing saidcharged particles in a powder form.

The success of the EPD process depends primarily on the electric chargecarried by the particles, which can be controlled through pretreatmentof the powder and by addition of surface active agents to thedispersion.

Most ceramics, metals, polymers, and semiconductors can beelectrodeposited providing that the powders are suitably dispersed. Thusresistors are produced by depositing resistive particles, capacitors bydepositing dielectric particles, and conductors by depositing conductiveparticles. In addition, piezzoelectric elements and rechargeable ornonrechargeable batteries can be created by employing the technology ofthe invention.

According to one aspect of the invention, the EPD technology may beapplied by completely covering the one orifice of the via-hole with oneelectrode of the EPD cell. The volume of the via-hole is immersed in thesuspension, a second electrode is provided, and an electric field isapplied between the electrodes through the via-hole and the suspension.This field causes charged particles that were in the suspension to bedeposited by EPD onto the inner surface of the electrode, filling thevia-hole until a required deposit thickness is obtained. Since theelectrical value of the resulting component electrode depends on theknown electric constants of the suspended particles (resistance,dielectric constant, etc.) and the dimensions of the component, goodagreement between the calculated and manufactured values are achieved.This follows from the fact that the diameters of the via-holes areaccurately controlled during their production by methods that are wellknown to the man skilled in the art (see for example, U.S. Pat. No.5,841,075). When the charged particles have been deposited to therequired thickness, the field is turned off and the substrate is thenremoved from the EPD cell. The thickness of the deposited layer is afunction of the concentration of particles in the suspension, current,and time and consequently it is easily monitored, controllable andreproducible.

If so desired, the process of manufacturing the electrical component iscompleted by immersing the via-hole into a second EPD cell anddepositing conductive particles until the via-hole is completely full.

Alternatively, different particles can be precipitated in the via-holein any desired order. For example, one or more different electroniccomponents can be formed in the same via-hole. Thus, a part of a circuitconsisting of, for example, a resistor and capacitor connected in seriescan be produced in a single via-hole. Similarly, any other combinationof two or more components is possible. The only limitation being thephysical capacity of the via-hole. It should be noted that in the caseof some of the electrical components, such as batteries, holes ofdiameters larger than those associated with conventional via-holes arerequired in order to deposit a sufficient quantity of material to createthe component. In this manner, a component, or components, possessingpredetermined electrical characteristics has been created in thevia-hole. This reduces the overall length of conducting lines in thefinal circuit; since the depth of the via-holes, which in the existingtechnology contained only conductors, now contain passive elements andconductors to provide electrical continuity between the layers of themulti-layer system. Since many of the components are now embedded in avertical direction instead of all of the components being dispersedhorizontally on the surface of the layers as in the prior art, theoverall volume of the multi-layer system and amount of substratematerial required to support the components is reduced.

All of the above and other characteristics and advantages of theinvention will be further demonstrated by means of the followingillustrative and non-limitative description of preferred embodimentsthereof, with reference to the appended drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 schematically illustrates a device for carrying out an EPDprocess;

FIG. 2A is a cross-sectional view schematically showing the substrate;FIG. 2B is a cross-sectional view schematically showing the addition ofa via hole to the substrate;

FIG. 2C is a cross-sectional view schematically showing the placement ofthe electrodes;

FIG. 2D is a cross-sectional view schematically showing the situationafter the deposition of a first layer;

FIG. 2E is a cross-sectional view schematically showing the situationafter the deposition of a second layer;

FIG. 2F is a cross-sectional view schematically showing the situationafter the deposition of a third layer; and,

FIG. 2G is a cross-sectional view schematically showing the situationafter completion of the deposition process.

FIG. 3A schematically shows a MCM with the electronic componentsarranged in a single layer on the surface according to prior art;

FIG. 3B shows the device of FIG. 3A with passive elements distributed onthe surfaces of the different dielectric layers in order to miniaturizethe device according to prior art; and

FIG. 3C shows the device of FIG. 3A with passive elements created in thevia-holes according to the method of the invention.

DETAILED DESCRIPTION OF THE INVENTION

An electrophoretic deposition (EPD) cell 1 is shown schematically inFIG. 1. The cell 1 consists of a container with an electric circuitconsisting of an “upper” positive electrode 4 connected through a DCpower supply 5 to a “lower” negative electrode 6. The substrate andelectrodes are suspended in a liquid suspension 17.

The suspension consists of particles of the material that has beenchosen for the manufacture of the electrical component to which positiveelectrical charges have been attached by adsorption of ions. Theparticles are suspended in either water or any other suitable liquid,such as alcohol, depending upon the properties of the powder to beplaced in suspension and the type of substrate.

As mentioned above, the particles of the suspension are chosen accordingto the type of passive component that should be formed and the desiredvalues of the electrical properties of said component. Conductors areproduced from metals, including gold, silver, copper, aluminum, nickel,platinum, and palladium. Capacitors are made from high dielectricconstant materials such as BaTiO₃, Ta₂O₅, or PZT. Inductor cores aremade from ferromagnetic materials, and resistors from controlledcombinations of insulating materials such as glass, ceramics, orpolymers with conducting materials such as ruthenium or any of themetals that are used to create conductors.

Using the technology of this invention, it is also possible tomanufacture piezoelectric devices having an electrode componentconsisting of PZT, magnetoresistive sensors from cobalt/coppercompositions, and magnetic actuators from materials such asTb_(0.30)Dy_(0.70)Fe_(1.92). Using EPD it is also possible to create Liand Ni/Cd batteries.

The substrate 2 (in FIG. 1) is placed in the EPD cell 1 such that thevia-hole 3 is completely immersed in the suspension. The via-holes arecreated by techniques that are well known in the art. Much care is takento maintain a uniform cross section of the hole throughout the entirethickness of the substrates in order to allow production of high qualityelectrical components. The lower electrode 6 is positioned such that itcompletely covers the orifice of the via-hole and an electric field iscreated in the EPD cell. Said electric field causes the electricallycharged particles of the suspension to be deposited on the inner surfaceof electrode 6 that is directed towards the upper orifice of thevia-hole.

According to one aspect of the invention, the lower electrode can bepart of the conductive pattern deposited on the surface of thesubstrate. As will be obvious to a man skilled in the art, severalidentical component electrodes, namely, same electrical component typescan be formed in different via-holes at the same time.

FIGS. 2A through 2G show the EPD process in more detail. The processbegins, in FIG. 2A, with a substrate layer generally indicated by thereference numeral 2. In FIG. 2B, the via-hole by the numeral 3 iscreated. In FIG. 2C, the lower electrode designated by numeral 6 and theupper electrode designated by numeral 4 are placed in position. FIG. 2Dshows the situation after the deposition of the first layer designatedby numeral 7. In most embodiments, 7 is a conducting layer that servesas a contact point for the element to be created in the via-hole. It isnot, however, necessary to begin the process by depositing a conductivelayer for example if the electrode 6, is part of the conducting patternon the surface of the substrate.

The substrate and electrodes are now removed from the cell containingthe conductive material and moved to an EPD cell containing a suspensionof particles suitable to form the desired component. It should be notedthat, for simplicity, the invention is described in terms of thedeposition of a single type of particle, it is possible to co-deposittwo or more types of charged particles from the same suspension in orderto form electronic components with certain characteristics. FIG. 2Eshows the situation at the end of the deposition of the particles thatconstitute the electronic component 8. The thickness t is easilydetermined from the desired electric value of the component. For examplein the case of a capacitor, the capacitance depends on thecross-sectional area of the via-hole, the dielectric constant of theparticles deposited in the EPD process, and the thickness t. Since thevia-hole is precisely created, its diameter is known. It is easy tocalibrate the EPD cell in order to accurately produce a desiredthickness of deposited material, since the dielectric constant of theparticles in the suspension is also known.

The substrate and electrodes are now removed from the second EPD celland returned to the first cell containing the conductive material (FIG.2F). In this step of the process, the remainder of the via-hole isfilled with conductive material forming the second contact point of theelectronic element. Finally, in FIG. 2G, the electrodes are removed andthe substrate, with the electronic element created in the via-hole, isremoved from the suspension and dried and treated according to theapplication, employing techniques well known in the art.

To create an inductor, a spiral conducting pattern is created on thesubstrate above the upper orifice of the via-hole by techniques wellknown in the art, for example by screen printing or as disclosed in U.S.Pat. No. 6,040,226. The electrode of the EPD cell is placed over saidspiral and orifice and ferromagnetic particles are deposited in thevia-hole to produce a ferromagnetic “core” for the inductor. Thisferromagnetic layer increases the Q factor of the inductor and allowsthe use of smaller components to achieve the desired inductance.

In other embodiments of the invention, the substrate and electrodes canbe moved to a third EPD cell containing a suspension of differentelectrically charged non-conductive particles and another or a morecomplex electrical component can be formed in the same via-hole. Thisprocess can be repeated several times forming via-holes with any desiredcombination of non-conductive and conductive particles forming theelectrical components described above.

Deposition of more than one layer in the via-holes is possible using theEPD process because the substrate is moved from one cell to anotherbefore the previously deposited layers have had a chance to cure. Thelayers in the via-hole constitute what is known in the art as a “greenbody”, i.e. they have no mechanical strength and contain cavities filledwith solvent that allow for continuation of the electric field necessaryfor the deposition of subsequent layers. However, the green body isimpermeable to the suspended powder material intended for depositionwithin the via-hole on a previously deposited layer. Although thestrength of the electric field in the via-hole will be decreased afterthe deposition of each layer, it is possible to compensate for thiseffect by increasing the electrical potential between the EPDelectrodes.

An example of an electrical component formed by a multi-layer depositionprocess is a lithium polymer battery. As discussed previously, toproduce a battery, it might be necessary to prepare a hole in thesubstrate with a diameter larger than that associated with conventionalvia-holes. The substrate, with the hole of the required diameter isplaced in a first EPD cell containing lithium cobalt dioxide powder insuspension. The electrodes are supplied and a layer, that serves as thecathode of the battery is deposited. The substrate is then moved to asecond EPD cell containing powders of a polymer composite and a lithiumsalt which are co-deposited to form the solid polymer electrolyte layer.Finally, the substrate is moved to a third EPD cell, where a graphitelayer, that serves as the anode of the battery is deposited.

When all of the component electrodes in all of the layers are formed inthe manner described above; external components, conducting lines, andadditional passive components are attached to the various substrates andthe final integrated multi-layer electronic device is assembled usingconventional techniques. The techniques of the final assembly ofintegrated multi-layer MCMs are well known, and therefore they are notdiscussed here.

FIGS. 3A to 3C show the assembled integrated multi-layer device in whichthe components are designated as follows: dielectric substrate layers 2,via-holes 3, conducting lines 9, an integrated circuit chip 10, passivecomponents 11, and the component electrodes of the invention 12.

FIGS. 3A and 3B show the assembly according to the methods of the priorart. In FIG. 3B, some of the passive components that are located on theupper surface only of the substrate of FIG. 3A have been relocated onthe surfaces of the internal substrates of the multi-layer structure.All of the methods of depositing the film layers that make up thepassive electronic components on the surfaces of the substrates sufferfrom difficulties in accurately controlling the width and thickness ofthe films. In applications where strict tolerances for the electricalparameters of the components are necessary, considerable time, andtherefore expense, must be invested in trimming the films; or, expensivethin-film technology must be employed.

FIG. 3C shows the device of FIGS. 3A and 3B, manufactured according tothe method of the invention. It will be recognized by the experiencedobserver that the method of the invention leads to the construction of adevice containing a greatly reduced overall length of conducting linesconnecting the electrical components and also to a completed multi-layerstructure occupying significantly smaller volume than the equivalentdevice constructed according to the existing methods.

Although embodiments of the invention have been described by way ofillustration, it will be understood that the invention may be carriedout with many variations, modifications, and adaptations withoutdeparting from its spirit or exceeding the scope of the claims.

1. A method for the implementation of one or more electrical componentsin the via-holes of a substrate comprising the steps: (a) completelyimmersing said substrate containing said via-holes into anelectrophoretic cell containing a liquid suspension consisting ofelectrically charged conductive or non-conductive particles of materialthat has been chosen to form the first layer of the first of said one ormore electrical components; (b) placing a first electrode such that itcompletely covers a first orifice of each of said via-hole(s), in whichsaid first electrical component is to be implemented; (c) providing asecond electrode positioned in said electrophoretic cell on the side ofsaid substrate opposite to said first orifice; (d) creating an electricpotential between said first electrode and said second electrode, whichcreates an electric field passing through said via-hole(s) and saidliquid suspension, thereby causing said electrically charged particlesto be deposited on the surface of said first electrode that is directedaway from said first orifice of said via-hole(s), until a portion of thevolume of said via-hole(s) is filled with a first layer of said chargedparticles; (e) removing said substrate from said electrophoretic cell;(f) completely immersing said substrate containing said via-holes into adifferent electrophoretic cell containing a liquid suspension consistingof electrically charged conductive or non-conductive particles of adifferent material that has been chosen to form the second layer of thefirst of said one or more electrical components; (g) repeat steps (b) to(e), wherein in step (d) said second layer is deposited within saidvia-hole on the surface of said first layer; and (h) repeat steps (f)and (g) as many times as necessary until said one or more electricalcomponents have been implemented in the via-holes of said substrate. 2.The method according to claim 1 wherein the electrical components areselected from the group comprising: capacitors; resistors; piezoelectricelements; inductors; magnetoresistive sensors; magnetic actuators; andbatteries.
 3. The method according to claim 1, wherein thenon-conductive particles are selected from the group comprising:dielectric particles; resistive particles; ferromagnetic particles; andpiezoelectric particles.
 4. The method according to claim 1 wherein theelectrical components implemented within the via-holes consist of two ormore layers each composed of one or more types of particles that havebeen deposited or co-deposited within said via-holes.